CS 221
Computer Organization and Assembly Language Programming

Fall 2024

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Readings

• CPU:
  • N2T: Chapter 5 Intro, 5.1.4, 5.2.1, 5.2.2, 5.3.1, (slides 27-48, 78-81)
  • N2T: Chapter 4 Intro, 4.1.2, 4.2.1, 4.2.2, 4.2.3, (slides 7-16, 19-23, 33-37, 41-47)

Description

This assignment will focus on the following tasks:

• building the CPU

Build the CPU circuit described in Project 5:

N2T: Project 5

Chapter 5 provides the contract for each circuit, i.e. description of its behavior, names and number inputs, names and state of outputs. The API is available here:

The Hack Chipset

Design in Logisim

Note the following requirements:

• arrange the circuits one after the other in the given order
• label the input pins as specified in the contract
• if there are multiple circuits on the canvas add the circuit index (for example a0,b0,out0)
• save the Logisim files in folder projects/5/a9

Here are additional specific requirements:

• Loader [not in the book, combinational gate]:

  Chip name: Loader
  Inputs:    d1, d2, d3,    // same meaning as Figure 4.4, p.68
             ctype          // is this ctype instruction
  Outputs:   loadA, loadD, loadM   // set to 1 if inputs indicate a value
                                   // should be loaded in respective destination
                                   // any subset of these may be 1
  

  This is similar to the Jumper and allows us to decide whether A, D, or M should load a new value:

  • save in Loader.circ
  • moderate use of basic gates; this is a very simple circuit

• CPU Setup (1):
  • start new Logisim project and save in file named CPU.circ; then create four additional subcircuits in this project as follows:
    • do this separately for each circuit: ALU, Jumper, PC, Loader, ...
    • from Menu Bar: "Project=>Add Circuit..."
    • use "Open..." or cut and paste the circuit

    This will allow you to drag your own circuits as boxed components onto the CPU Canvas. It essentially creates a small library similar to Wiring, Arithmetic, etc:

• CPU Setup (2) - this step is optional:
  • save the following file in folder projects/5/a9:

    nand2tetris.jar

  • from Menu Bar: "Project=>Load Library=>Jar Library..."
  • find the file that you downloaded: nand2tetris.jar
  • should see a new library at the bottom called nand2tetris that contains ALU, PC

• CPU:
  • follow the diagram in Figure 5.8 on page 20
  • consider immediately splitting the instruction into appropriate groups of bits
  • for testing need to attach a clock
  • minimal use of basic gates

• CPU Testing - short test session is available here:

  CPU Testing

Design in HDL

Here are additional specific requirements:

• Implement one circuit at a time. For circuit X copy X.hdl, X.cmp, X.tst to folder projects/3/a8.

• Loader:
  • see description above
  • save in Loader.hdl
  • moderate use of basic gates

• Test Loader:
  • download test files: Loader.tst | Loader.cmp (fill in missing values)
  • test in Hardware Simulator
  • in the submission include Loader.cmp

• CPU:
  • follow the diagram in Figure 5.8 on page 20
  • use ARegister and DRegister which are specialized versions for the plain Register
  • minimal use of basic gates

What to turn in

Zip folder a9/ in file named a9.zip and upload it to the Moodle dropbox. When a9.zip is unzipped it should produce folder a9/ with the files inside.