CS 221
Computer Organization and Assembly Language Programming

Spring 2026

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Assignment 5

Due: Feb 26, by 11:59pm

Design in Logisim

• arrange the circuits vertically in the given order (each below the previous one, *not* in a grid)
• label the input pins as specified in the contract (ok that there will be duplicate names)

• Splitter: Logisim has a component called Splitter under Wiring; it can be used to split or merge wires depending on the point of view (i.e. on the orientation); it can be oriented appropriately via the Properties panel

• Constants: to achieve the effect of sending the constant value 1 to a pin in Logisim use the component 1⚬Constant under Wiring (it can also send 0)

• save the Logisim files in folder computer/arithmetic/circ

• Mux4Way16, Mux8Way16:
  • save in file named Mux4Way16.circ and Mux8Way16.circ
  • basic gates should be avoided if possible
  • Mux4Way16 should be built primarily of Mux16 (as few as possible)
  • Mux8Way16 should be built primarily of Mux16, Mux4Way16 (as few as possible)
  • Logisim has a single Multiplexer component whose properties can be changed to have the desired number of inputs and bus widths

• DMux4Way, DMux8Way:
  • save in file named DMux4Way.circ and DMux8Way.circ
  • basic gates should be avoided if possible
  • DMux4Way should be built primarily of DMux
  • DMux8Way should be built primarily of DMux, DMux4Way
  • Logisim has a single Demultiplexer component whose properties can be changed to have the desired number of outputs and bus widths

• HalfAdder, FullAdder:
  • save in file named HalfFullAdder.circ
  • cannot use within each other; only basic gates may be used, as few as possible

• Add16:
  • save in file named Add16.circ
  • despite the name, for the Logisim version the two inputs will be of width 6, i.e. the Adder will only add 6 bit numbers
  • the circuit should be built of Adder components (under Arithmetic) whose pins have width 1; these will represent Half/FullAdder depending on how they are used
  • basic gates should be avoided, if possible

• Inc16:
  • save in file named Inc16.circ
  • despite the name, for the Logisim version the inputs will be of width 6, i.e. the circuit will only increment 6 bit numbers
  • build with suitably sized Adder
  • basic gates should be avoided, if possible

Design in HDL

• Splitter:
  • to achieve the effect of splitting wires in HDL you write:
    • gatepin=wire[i..j] or gatepin[i..j]=wire (widths have to match)
    • gatepin[i]=wire[j] or gatepin=wire[j] or gatepin[i]=wire (for 1-bit versions)
    • gatepin[i..j]=wire[p..q] (widths have to match)
    • gatepin could be an input or output pin of the gate

• Constants: to achieve the effect of sending the constant values 1 or 0 to a pin in HDL you write gatepin[?]=true or gatepin[?]=false (the ? is the index or range of indices to set)

Here are additional specific requirements:

• Implement one circuit at a time. For circuit X copy X.hdl, X.cmp, X.tst to folder computer/arithmetic/hdl.

• Mux4Way16, Mux8Way16:
  • basic gates should be avoided, if possible
  • Mux4Way16 should be built primarily of Mux16 (as few as possible)
  • Mux8Way16 should be built primarily of Mux16, Mux4Way16 (as few as possible)

• DMux4Way, DMux8Way:
  • basic gates should be avoided, if possible
  • DMux4Way should be built primarily of DMux (as few as possible)
  • DMux8Way should be built primarily of DMux, DMux4Way (as few as possible)

• HalfAdder, FullAdder: cannot use within each other; only basic gates may be used, as few as possible

• Add16: built primarily out of HalfAdder, FullAdder; basic gates should be avoided, if possible

• Inc16:
  • ok to use any of the previous chips
  • basic gates should be avoided, if possible

The End