Readings
- Addition:
- IMAL: Section 1.6.1, 1.6.2
- N2T: Section 2.1 (slides 14-33)
- Adders:
- N2T: Chapter 1 (all slides)
- N2T: Section 2.2.1, 2.3, 2.5 (slides 60-64, 66-end)
Description
This assignment will focus on creating digital circuits. The main tasks are:
- building and testing NWay plexers
- building and testing circuits for addition
Build the circuits described in Project 2 (except
ALU, but including
Mux4Way, Mux8Way, DMux4Way, DMux8Way from Project 1):
N2T: Project 2
Chapter 2 provides the contract for each circuit, i.e. description of its behavior, names and number inputs, names and state of outputs. The API is available here:
The Hack Chipset
Design in Logisim
Note the following requirements:
- arrange the circuits vertically in the given order (each below the previous one, *not* in a grid)
- label the input pins as specified in the contract
Here are a few comments on Logisim:
Splitter: Logisim has a component called Splitter under Wiring; it can be used to split or merge wires depending on the point of view (i.e. on the orientation); it can be oriented appropriately via the Properties panel
Constants: to achieve the effect of sending the constant value 1 to a pin in Logisim use the component 1⚬Constant under Wiring (it can also send 0)
Here are additional specific requirements:
- save the Logisim files in folder
computer/arithmetic/circ
Mux4Way16, Mux8Way16:
- save in file named Mux4Way16.circ and Mux8Way16.circ
Mux4Way16 should be built primarily of Mux16 (as few as possible); basic gates should be avoided if possible
Mux8Way16 should be built primarily of Mux16, Mux4Way16 (as few as possible); basic gates should be avoided if possible
- Logisim has a single Multiplexer component whose properties can be changed to have the desired number of inputs and bus widths
DMux4Way, DMux8Way:
- save in file named DMux4Way.circ and DMux8Way.circ
DMux4Way should be built primarily of DMux, i.e. only 2 outputs of width 1, and selector of width 1; basic/basic16 gates should be avoided, if possible
DMux8Way should be built primarily of DMux, DMux4Way, i.e. only 2 or 4 outputs of width 1, and selector of width 1 or 2; basic gates should be avoided, if possible
- Logisim has a single Demultiplexer component whose properties can be changed to have the desired number of outputs and bus widths
HalfAdder, FullAdder:
- save in file named HalfFullAdder.circ
- only basic gates allowed
Add16:
- save in file named Add16.circ
- despite the name, for the Logisim version the two inputs will be of width 6, i.e. the Adder will only add 6 bit numbers
- the circuit should be built of
Adder components (under Arithmetic); the wires of these components should have width 1
- basic gates should be avoided, if possible
Inc16:
- save in file named Inc16.circ
- despite the name, for the Logisim version the inputs will be of width 6, i.e. the circuit will only increment 6 bit numbers
- build with suitably sized
Adder
- basic gates should be avoided, if possible
Design in HDL
Here are a few comments on HDL:
Splitter:
- to achieve the effect of splitting wires in HDL you write:
gatepin=wire[i..j] or gatepin[i..j]=wire (widths have to match)
gatepin[i]=wire[j] or gatepin=wire[j] or gatepin[i]=wire (for 1-bit versions)
gatepin[i..j]=wire[p..q] (widths have to match)
gatepin could be an input or output pin of the gate
Constants: to achieve the effect of sending the constant values 1 or 0 to a pin in HDL you write gatepin[?]=true or gatepin[?]=false (the ? is the index or range of indices to set)
Here are additional specific requirements:
- Implement one circuit at a time. For circuit X copy X.hdl, X.cmp, X.tst to folder computer/arithmetic/hdl.
Mux4Way16, Mux8Way16:
Mux4Way16 should be built primarily of Mux16 (as few as possible); basic gates may be used if useful
Mux8Way16 should be built primarily of Mux16, Mux4Way16 (as few as possible); basic gates should be avoided, if possible
DMux4Way, DMux8Way:
DMux4Way should be built primarily of DMux (as few as possible); basic gates may be used if useful
DMux8Way should be built primarily of DMux, DMux4Way (as few as possible); basic gates should be avoided, if possible
HalfAdder, FullAdder: only basic gates may be used
Add16: built primarily out of HalfAdder,
FullAdder; basic gates should be avoided, if possible
Inc16:
- use
Adder16
- basic gates should be avoided, if possible